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18th IEEE VLSI Test Symposium (VTS'00)
Test Generation for Accurate Prediction of Analog Specifications
Montreal, Canada
April 30-May 04
ISBN: 0-7695-0613-5
Ram Voorakaranam, Georgia Institute of Technology
Abhijit Chatterjee, Georgia Institute of Technology
ATPG approaches for analog circuits in the past have targeted the testing of catastrophic and parametric faults. It has been shown recently that analog circuit specifications can be predicted from the transient response of the circuit under test.In this paper, we present a new ATPG algorithm for synthesizing a test stimulus that enables accurate prediction of circuit specifications from its response to the test stimulus. Use of simple linear models for ATPG and more complex nonlinear models for specification prediction results in a test generation procedure that is both accurate and simulation efficient. Due to the incorporation of measurement noise during test optimization, robust specification prediction is possible.
Citation:
Ram Voorakaranam, Abhijit Chatterjee, "Test Generation for Accurate Prediction of Analog Specifications," vts, pp.137, 18th IEEE VLSI Test Symposium (VTS'00), 2000
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