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1999 17TH IEEE VLSI Test Symposium
A New Bare Die Test Methodology
San Diego, California
April 26-April 30
ISBN: 0-7695-0146-X
Zao Yang, Silicon Graphics Inc.
K.-T. Cheng, University of California at Santa Barbara
K.L. Tai, Bell Laboratories
While multichip module technology has been developed for high performance IC applications, the technology is not widely adopted due to economical reasons. One of the rea- sons that makes the technology economically unattractive is the problems and the high cost associated with testing and diagnosing each individual un-packaged ICs in the system and the MCM module itself. The low MCM system yield pre- vents the technology from being used other than in high cost and high performance applications. In this paper, we pro- pose a new methodology using ideas of tester-on-a-chip and a pressure contact technology to test bare dies. This method- ology can reduce the IC testing cost and overall cost of the MCM module. It can also be considered as an alternative to high speed wafer probe. We designed an experiment for SRAM dies to examine the feasibility of this new method.
Citation:
Zao Yang, K.-T. Cheng, K.L. Tai, "A New Bare Die Test Methodology," vts, pp.290, 1999 17TH IEEE VLSI Test Symposium, 1999
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