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1999 17TH IEEE VLSI Test Symposium
Adaptive Techniques for Improving Delay Fault Diagnosis
San Diego, California
April 26-April 30
ISBN: 0-7695-0146-X
Jayabrata Ghosh-Dastidar, University of Texas at Austin
Nur A. Touba, University of Texas at Austin
This paper presents adaptive techniques for improving delay fault diagnosis. These techniques reduce the search space for direct probing which can save a lot of time during failure analysis. Given a set of two-pattern tests that resulted in faulty output responses, a procedure for deriving additional two-pattern tests that will improve the diagnostic resolution of delay faults is described. Two new techniques based on adjacency testing and delay-size bounding are presented. These techniques can be used to greatly reduce the number of suspect lines and thereby provide a more precise diagnosis that is valid for either single or multiple delay faults. Experimental results are shown indicating that the number of suspects can be reduced dramatically for both single and multiple delay faults.
Citation:
Jayabrata Ghosh-Dastidar, Nur A. Touba, "Adaptive Techniques for Improving Delay Fault Diagnosis," vts, pp.168, 1999 17TH IEEE VLSI Test Symposium, 1999
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