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1999 17TH IEEE VLSI Test Symposium
A Flexible Path Selection Procedure for Path Delay Fault Testing
San Diego, California
April 26-April 30
ISBN: 0-7695-0146-X
Irith Pomeranz, University of Iowa
Sudhakar M. Reddy, University of Iowa
We describe a path selection procedure that selects target faults for path delay fault test generation. Since large numbers of path delay faults may be untestable, the proposed procedure does not select a fixed set of paths. Instead, it provides compactly represented subsets of paths, referred to as superpaths, and allows the test generation procedure to select one path out of each subset based on testability considerations.
Citation:
Irith Pomeranz, Sudhakar M. Reddy, "A Flexible Path Selection Procedure for Path Delay Fault Testing," vts, pp.152, 1999 17TH IEEE VLSI Test Symposium, 1999
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