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1999 17TH IEEE VLSI Test Symposium
Built-In Current Sensor for IDDQ Testing in Deep Submicron CMOS
San Diego, California
April 26-April 30
ISBN: 0-7695-0146-X
ASCII Text
x 
 
T. Calin, L. Anghel, M. Nicolaidis, "Built-In Current Sensor for IDDQ Testing in Deep Submicron CMOS," VLSI Test Symposium, IEEE, pp. 135, 1999 17TH IEEE VLSI Test Symposium, 1999.
 
 
BibTex
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@article{ 10.1109/VTEST.1999.766657,
author = {T. Calin and L. Anghel and M. Nicolaidis},
title = {Built-In Current Sensor for IDDQ Testing in Deep Submicron CMOS},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {1999},
issn = {1093-0167},
pages = {135},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1999.766657},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Test Symposium, IEEE
TI - Built-In Current Sensor for IDDQ Testing in Deep Submicron CMOS
SN - 1093-0167
SP
EP
A1 - T. Calin,
A1 - L. Anghel,
A1 - M. Nicolaidis,
PY - 1999
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
T. Calin, TIMA
L. Anghel, TIMA
This paper describes results on Built-In Current Sensors destined to overcome the limitations of IDDQ testing in deep submicron circuits. The problems of performance penalty, test accuracy and test speed are addressed. A new sensor composed of a source-controlled comparator operating at low supply voltages and bias currents is used. Gradual sensor activation ensures reliable low noise operation. It is combined with large bypass MOS switches avoiding performance penalty, as well as a second bypass and compensation logic to increase test speed.
Citation:
T. Calin, L. Anghel, M. Nicolaidis, "Built-In Current Sensor for IDDQ Testing in Deep Submicron CMOS," vts, pp.135, 1999 17TH IEEE VLSI Test Symposium, 1999
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