4.2 Synthesis of Zero-Aliasing Elementary-Tree Space Compactors

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16th IEEE VLSI Test Symposium

Monterey, California

April 26-April 30

ISBN: 0-8186-8436-4

	ASCII Text	x
	B. Pouya, N.A. Touba, "4.2 Synthesis of Zero-Aliasing Elementary-Tree Space Compactors," VLSI Test Symposium, IEEE, pp. 70, 16th IEEE VLSI Test Symposium, 1998.

	BibTex	x
	@article{ 10.1109/VTEST.1998.670851, author = {B. Pouya and N.A. Touba}, title = {4.2 Synthesis of Zero-Aliasing Elementary-Tree Space Compactors}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {1998}, issn = {1093-0167}, pages = {70}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1998.670851}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - 4.2 Synthesis of Zero-Aliasing Elementary-Tree Space Compactors SN - 1093-0167 SP EP A1 - B. Pouya, A1 - N.A. Touba, PY - 1998 VL - 0 JA - VLSI Test Symposium, IEEE ER -

Citation:

B. Pouya, N.A. Touba, "4.2 Synthesis of Zero-Aliasing Elementary-Tree Space Compactors," vts, pp.70, 16th IEEE VLSI Test Symposium, 1998

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