15th IEEE VLSI Test Symposium (VTS'97)
On Optimizing BIST-Architecture by Using OBDD-based Approaches and Genetic Algorithms
Monterey, California
April 27-May 01
ISBN: 0-8186-7810-0
Can Oekmen, Institute of Computer Science Albert-Ludwigs-University
Martin Keim, Institute of Computer Science Albert-Ludwigs-University
Rolf Krieger, Institute of Computer Science Albert-Ludwigs-University
Bernd Becker, Institute of Computer Science Albert-Ludwigs-University
We introduce a two-staged Genetic Algorithm for optimizing weighted random pattern testing in a Built-In-Self-Test (BIST) environment. The first stage includes the OBDD-based optimization of input probabilities with regard to the expected test length. The optimization itself is constrained to discrete weight values which can directly be integrated in a BIST environment. During the second stage, the hardware-design of the actual BIST-structure is optimized. Experimental results are given to demonstrate the quality of our approach.
Index Terms:
Build in self test (BIST), genetic algorithm, input probability, weighted random pattern generation (WRPG)
Citation:
Can Oekmen, Martin Keim, Rolf Krieger, Bernd Becker, "On Optimizing BIST-Architecture by Using OBDD-based Approaches and Genetic Algorithms," vts, pp.426, 15th IEEE VLSI Test Symposium (VTS'97), 1997