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15th IEEE VLSI Test Symposium (VTS'97)
SPITFIRE: scalable parallel algorithms for test set partitioned fault simulation
Monterey, California
April 27-May 01
ISBN: 0-8186-7810-0
D. Krishnaswamy, Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
E.M. Rudnick, Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
J.H. Patel, Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
P. Banerjee, Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
We propose three synchronous parallel algorithms for scalable parallel test set partitioned fault simulation. The algorithms are based on a new two-stage approach to parallelizing fault simulation for sequential VLSI circuits in which the test set is partitioned among the available processors, The test set partitioning inherent in the algorithms overcomes the good circuit logic simulation bottleneck that exists in traditional fault partitioned approaches to parallel fault simulation. The implementations were done on a shared memory multiprocessor and on a network of workstations. Two of the algorithms show a small degree of pessimism in a few cases, with respect to the fault coverage as compared with a uniprocessor run, while the third algorithm provides the same results as in a uniprocessor run. All algorithms provide excellent speedups and perform much better than a traditional fault partitioned approach, on both shared and distributed memory parallel platforms.
Index Terms:
VLSI; SPITFIRE; scalable parallel algorithms; test set partitioned fault simulation; synchronous parallel algorithms; sequential VLSI circuits; fault coverage
Citation:
D. Krishnaswamy, E.M. Rudnick, J.H. Patel, P. Banerjee, "SPITFIRE: scalable parallel algorithms for test set partitioned fault simulation," vts, pp.274, 15th IEEE VLSI Test Symposium (VTS'97), 1997
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