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15th IEEE VLSI Test Symposium (VTS'97)
Test Synthesis for DC Test and Maximal Diagnosis of Switched-Capacitor Circuits
Monterey, California
April 27-May 01
ISBN: 0-8186-7810-0
ASCII Text
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Christian Dufaza, Hassan Ihs, "Test Synthesis for DC Test and Maximal Diagnosis of Switched-Capacitor Circuits," VLSI Test Symposium, IEEE, pp. 252, 15th IEEE VLSI Test Symposium (VTS'97), 1997.
 
 
BibTex
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@article{ 10.1109/VTEST.1997.600284,
author = {Christian Dufaza and Hassan Ihs},
title = {Test Synthesis for DC Test and Maximal Diagnosis of Switched-Capacitor Circuits},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {1997},
isbn = {0-8186-7810-0},
pages = {252},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1997.600284},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Test Symposium, IEEE
TI - Test Synthesis for DC Test and Maximal Diagnosis of Switched-Capacitor Circuits
SN - 0-8186-7810-0
SP
EP
A1 - Christian Dufaza,
A1 - Hassan Ihs,
PY - 1997
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
Christian Dufaza, Laboratoire d'Informatique de Robotique
Hassan Ihs, Laboratoire d'Informatique de Robotique
This paper presents a DFT/BIST technique for switched-capacitor (SC) circuits that consists of measuring all capacitance ratios of transfer functions in the DC domain. Then, the specifications of a SC circuit are computed from these measured capacitance ratios and compared to the fault-free ones. Moreover, a maximal fault diagnosis is realized for the capacitances. This test technique uses re-configur
Citation:
Christian Dufaza, Hassan Ihs, "Test Synthesis for DC Test and Maximal Diagnosis of Switched-Capacitor Circuits," vts, pp.252, 15th IEEE VLSI Test Symposium (VTS'97), 1997
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