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15th IEEE VLSI Test Symposium (VTS'97)
CLP-based Multifrequency Test Generation for Analog Circuits
Monterey, California
April 27-May 01
ISBN: 0-8186-7810-0
In our previous work we elaborated a multifrequency test generation method (TPG) for detecting parametric and catastrophic faults in linear analog circuits. The method was formulated as an optimization problem which was solved by Sequential Quadratic Programming (SQP), a non-linear programming method available in MATLAB. Such standard optimization methods are based on and process local information and consequently cannot guarantee a global optimum. In this paper we propose a method based on Constraint Logic Programming(CLP) that solves the optimization problem in TPG as a series of Constraint Satisfaction Problems (UPS). Our TPG method is fully automatic and provides tight and guaranteed bounds on the global optima of a nonlinear function. The TPG method was implemented in CLP(BNR) Prolog. First, we illustrate the effectiveness of our approach on a number of nonlinearfunctions known to be dificult, and then we apply it to a realistic electronic circuit in the context of TPG. The two methods produce same results except for one case where S&P falls into a local minimum. This could lead to a wrong test selection. Moreover while the TPG took over a week of work using SQP it was solved in a matter of minutes using CLP.
Citation:
A. Abderrahman, E. Cerny, B. Kaminska, "CLP-based Multifrequency Test Generation for Analog Circuits," vts, pp.158, 15th IEEE VLSI Test Symposium (VTS'97), 1997
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