Fault characterization of standard cell libraries using inductive contamination

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14th IEEE VLSI Test Symposium (VTS '96)

Princeton, NJ

April 28-May 01

ISBN: 0-8186-7304-4

	ASCII Text	x
	J. Khare, W. Maly, N. Tiday, "Fault characterization of standard cell libraries using inductive contamination," VLSI Test Symposium, IEEE, pp. 405, 14th IEEE VLSI Test Symposium (VTS '96), 1996.

	BibTex	x
	@article{ 10.1109/VTEST.1996.510886, author = {J. Khare and W. Maly and N. Tiday}, title = {Fault characterization of standard cell libraries using inductive contamination}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {1996}, isbn = {0-8186-7304-4}, pages = {405}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1996.510886}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - Fault characterization of standard cell libraries using inductive contamination SN - 0-8186-7304-4 SP EP A1 - J. Khare, A1 - W. Maly, A1 - N. Tiday, PY - 1996 KW - cellular arrays; integrated circuit testing; fault diagnosis; surface contamination; fault characterization; standard cell libraries; inductive contamination analysis; defect coverage; contamination diagnosis; gate-level delay characterization; test generation VL - 0 JA - VLSI Test Symposium, IEEE ER -

J. Khare, Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

W. Maly, Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

N. Tiday, Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTEST.1996.510886

In this paper we demonstrate an Inductive Contamination Analysis (ICA)-based methodology for complete fault characterization of standard cell libraries. Such a characterization has applications in accurate assessment of defect coverage, contamination diagnosis, gate-level delay characterization and test generation.

Index Terms:

cellular arrays; integrated circuit testing; fault diagnosis; surface contamination; fault characterization; standard cell libraries; inductive contamination analysis; defect coverage; contamination diagnosis; gate-level delay characterization; test generation

Citation:

J. Khare, W. Maly, N. Tiday, "Fault characterization of standard cell libraries using inductive contamination," vts, pp.405, 14th IEEE VLSI Test Symposium (VTS '96), 1996

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