A tool for automatic generation of self-checking data paths

V
VTS
1995
13th IEEE VLSI Test Symposium (VTS'95)
Abstract - A tool for automatic generation of self-checking data paths

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13th IEEE VLSI Test Symposium (VTS'95)

Princeton, New Jersey

April 30-May 03

ISBN: 0-8186-7000-2

	ASCII Text	x
	B. Hamdi, H. Bederr, M. Nicolaidis, "A tool for automatic generation of self-checking data paths," VLSI Test Symposium, IEEE, pp. 0460, 13th IEEE VLSI Test Symposium (VTS'95), 1995.

	BibTex	x
	@article{ 10.1109/VTEST.1995.512675, author = {B. Hamdi and H. Bederr and M. Nicolaidis}, title = {A tool for automatic generation of self-checking data paths}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {1995}, isbn = {0-8186-7000-2}, pages = {0460}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1995.512675}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - A tool for automatic generation of self-checking data paths SN - 0-8186-7000-2 SP EP A1 - B. Hamdi, A1 - H. Bederr, A1 - M. Nicolaidis, PY - 1995 KW - automatic test software; circuit CAD; circuit testing; built-in self test; logic testing; automatic generation; self-checking data paths; CAD tools; microprocessors; microcontrollers; adders; ALUs; multipliers; dividers; shifters; register files; parity checkers; double rail checkers; circuit design VL - 0 JA - VLSI Test Symposium, IEEE ER -

B. Hamdi

H. Bederr

M. Nicolaidis

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTEST.1995.512675

Abstract: An important drawback of implementing self-checking circuits concerns the lack of dedicated CAD tools. This problem results on a significant increasing of the design effort and compromises the interest of such designs. CAD tools aimed to implement self-checking data paths is of high interest since data-paths are basic parts of microprocessors and microcontrollers. The tools presented here include generators of self-checking adders, ALUs, multipliers, dividers, shifters and register files, as well as generators of parity and double rail checkers. Another tool interconnects these blocks to generate the self-checking data-path.

Index Terms:

automatic test software; circuit CAD; circuit testing; built-in self test; logic testing; automatic generation; self-checking data paths; CAD tools; microprocessors; microcontrollers; adders; ALUs; multipliers; dividers; shifters; register files; parity checkers; double rail checkers; circuit design

Citation:

B. Hamdi, H. Bederr, M. Nicolaidis, "A tool for automatic generation of self-checking data paths," vts, pp.0460, 13th IEEE VLSI Test Symposium (VTS'95), 1995

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