13th IEEE VLSI Test Symposium (VTS'95)
Detectable perturbations: a paradigm for technology-specific multi-fault test generation
Princeton, New Jersey
April 30-May 03
ISBN: 0-8186-7000-2
Abstract: This paper introduces the concept of detectable perturbations as a method to generate tests that can then cover any technology-specific faults such as multiple bridging, open and stuck-at faults. Rather than devising a customized test pattern generation system for each class of technology-specific faults, we implemented a generic system to generate tests for single and multiple perturbations. We demonstrate the versatility of this approach by generating tests for a set of large benchmark circuits that have been mapped into singleand multi-output modules. These tests cover single stuck-at, multi-output bridging, stuck-at, as well as any mutation faults in the functionality of the technology-mapped cells. Experimental results provide useful insights about the quality of single stuck-at test patterns versus coverages for the additional classes of faults.
Index Terms:
combinational circuits; fault diagnosis; logic testing; cellular arrays; integrated circuit testing; automatic testing; detectable perturbations; technology-specific multi-fault test generation; multiple bridging; open faults; stuck-at faults; generic system; benchmark circuits; single-output modules; multi-output modules; mutation faults; technology-mapped cells; combinational circuits
Citation:
A. Zemva, F. Brglez, "Detectable perturbations: a paradigm for technology-specific multi-fault test generation," vts, pp.0350, 13th IEEE VLSI Test Symposium (VTS'95), 1995