A portable ATPG tool for parallel and distributed systems

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	Similar Articles Articles by F. Corno Articles by P. Prinetto Articles by M. Rebaudengo Articles by M.S. Reorda Articles by E. Veiluva

13th IEEE VLSI Test Symposium (VTS'95)

Princeton, New Jersey

April 30-May 03

ISBN: 0-8186-7000-2

	ASCII Text	x
	F. Corno, P. Prinetto, M. Rebaudengo, M.S. Reorda, E. Veiluva, "A portable ATPG tool for parallel and distributed systems," VLSI Test Symposium, IEEE, pp. 0029, 13th IEEE VLSI Test Symposium (VTS'95), 1995.

	BibTex	x
	@article{ 10.1109/VTEST.1995.512613, author = {F. Corno and P. Prinetto and M. Rebaudengo and M.S. Reorda and E. Veiluva}, title = {A portable ATPG tool for parallel and distributed systems}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {1995}, isbn = {0-8186-7000-2}, pages = {0029}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1995.512613}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - A portable ATPG tool for parallel and distributed systems SN - 0-8186-7000-2 SP EP A1 - F. Corno, A1 - P. Prinetto, A1 - M. Rebaudengo, A1 - M.S. Reorda, A1 - E. Veiluva, PY - 1995 KW - automatic testing; integrated circuit testing; logic testing; sequential circuits; parallel architectures; logic CAD; software portability; message passing; genetic algorithms; portable ATPG tool; parallel systems; distributed systems; parallel architectures; memory critical problems; electronic CAD; code portability; message-passing libraries; sequential circuits; PVM library; genetic algorithm; DEC Alpha AXP; CM-5 VL - 0 JA - VLSI Test Symposium, IEEE ER -

F. Corno, Dipartimento di Autom. e Inf., Politecnico di Torino, Italy

P. Prinetto, Dipartimento di Autom. e Inf., Politecnico di Torino, Italy

M. Rebaudengo, Dipartimento di Autom. e Inf., Politecnico di Torino, Italy

M.S. Reorda, Dipartimento di Autom. e Inf., Politecnico di Torino, Italy

E. Veiluva, Dipartimento di Autom. e Inf., Politecnico di Torino, Italy

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTEST.1995.512613

Abstract: The use of parallel architectures for the solution of CPU and memory critical problems in the electronic CAD area has been limited up to now by several factors, like the lack of efficient algorithms the reduced portability of the code, and the cost of the hardware. However, portable message-passing libraries are now available, and the same code runs on high-cost supercomputers, as well as on common workstation networks. The paper presents an effective ATPG system for large sequential circuits developed using the PVM library and based on a genetic algorithm. The tool, named GATTO has been run on a DEC Alpha AXP farm and on a CM-5. Experimental results are provided.

Index Terms:

automatic testing; integrated circuit testing; logic testing; sequential circuits; parallel architectures; logic CAD; software portability; message passing; genetic algorithms; portable ATPG tool; parallel systems; distributed systems; parallel architectures; memory critical problems; electronic CAD; code portability; message-passing libraries; sequential circuits; PVM library; genetic algorithm; DEC Alpha AXP; CM-5

Citation:

F. Corno, P. Prinetto, M. Rebaudengo, M.S. Reorda, E. Veiluva, "A portable ATPG tool for parallel and distributed systems," vts, pp.0029, 13th IEEE VLSI Test Symposium (VTS'95), 1995

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