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18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
Reducing Leakage with Mixed-V_th (MVT)
Kolkata, India
January 03-January 07
ISBN: 0-7695-2264-5
Frank Sill, University of Rostock
Frank Grassert, University of Rostock
Dirk Timmermann, University of Rostock
We present a new method for assignment of devices with different V_th in a double-V_th-process, whereas leakage is reduced and performance increases or is constant. A mixed-V_th gate type is developed, which renders new masks unnecessary. As compared with known methods, our approach achieves an additional leakage reduction of 25% while leakage reduction in raw designs is average 65%.
Citation:
Frank Sill, Frank Grassert, Dirk Timmermann, "Reducing Leakage with Mixed-V_th (MVT)," vlsid, pp.874-877, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005
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