A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design

V
VLSID
2005
18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
Abstract - A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design

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	Similar Articles Articles by Debashis Dutta Articles by Wouter A. Serdijn Articles by Swapna Banerjee Articles by Sriram Gupta

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)

Kolkata, India

January 03-January 07

ISBN: 0-7695-2264-5

	ASCII Text	x
	Debashis Dutta, Wouter A. Serdijn, Swapna Banerjee, Sriram Gupta, "A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design," VLSI Design, International Conference on, pp. 850-853, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.

	BibTex	x
	@article{ 10.1109/ICVD.2005.24, author = {Debashis Dutta and Wouter A. Serdijn and Swapna Banerjee and Sriram Gupta}, title = {A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2005}, issn = {1063-9667}, pages = {850-853}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.24}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design SN - 1063-9667 SP850 EP853 A1 - Debashis Dutta, A1 - Wouter A. Serdijn, A1 - Swapna Banerjee, A1 - Sriram Gupta, PY - 2005 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Debashis Dutta, DIT

Wouter A. Serdijn, Technical University Delft

Swapna Banerjee, Indian Institute of Technology-Kharagpur

Sriram Gupta, DCE

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.24

A novel topology for Translinear (TL) loops comprising of CMOS Second Generation Current Conveyors (CC-II) and diodes is proposed. The proposed methodology opens a new paradigm towards the design of Static and Dynamic TL circuits in CMOS technology. Simulation of a current multiplier and a Log-domain integrator demonstrates the concept.

Citation:

Debashis Dutta, Wouter A. Serdijn, Swapna Banerjee, Sriram Gupta, "A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design," vlsid, pp.850-853, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005

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