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18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design
Kolkata, India
January 03-January 07
ISBN: 0-7695-2264-5
Wouter A. Serdijn, Technical University Delft
Swapna Banerjee, Indian Institute of Technology-Kharagpur
A novel topology for Translinear (TL) loops comprising of CMOS Second Generation Current Conveyors (CC-II) and diodes is proposed. The proposed methodology opens a new paradigm towards the design of Static and Dynamic TL circuits in CMOS technology. Simulation of a current multiplier and a Log-domain integrator demonstrates the concept.
Citation:
Debashis Dutta, Wouter A. Serdijn, Swapna Banerjee, Sriram Gupta, "A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design," vlsid, pp.850-853, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005
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