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18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
Computer Aided Test (CAT) Tool for Mixed Signal SOCs
Kolkata, India
January 03-January 07
ISBN: 0-7695-2264-5
Shibaji Banerjee, Indian Institute of Technology-Kharagpur
Debdeep Mukhopadhyay, Indian Institute of Technology-Kharagpur
Dipanwita Roy Chowdhury, Indian Institute of Technology-Kharagpur
This paper introduces a Computer-Aided-Test (CAT) tool for Mixed Signal SOC designs. A new DFT strategy has been developed to make the testing scheme digitally compliant. The final DFT solution is generated through scheduling algorithms. The mixed signal cores have been accessed through specially design mechanisms (switches). Extensive experiments have been performed on Mixed Signal SOC benchmarks built of ISCAS?89 circuits for digital cores and ITC?97 circuits for analog cores. Results show that the CAT tool provides a hardware efficient integrated DFT solution.
Citation:
Shibaji Banerjee, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, "Computer Aided Test (CAT) Tool for Mixed Signal SOCs," vlsid, pp.787-790, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005
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