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18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
Hot Spots and Zones in a Chip: A Geometrician's View
Kolkata, India
January 03-January 07
ISBN: 0-7695-2264-5
S. Majumder, International Institute of Information Technology
S. Sur-Kolay, Indian Statistical Institute
S. C. Nandy, Indian Statistical Institute
B. B. Bhattacharya, Indian Statistical Institute
B. Chakraborty, Indian Statistical Institute
In this paper we have proposed geometric models that are employed to devise a scheme for identifying the hot spots and zones in a chip. These spots or zones need to be guarded thermally to ensure performance and reliability of the chip. Two different models, namely continuous and discrete, are presented to take into account whether the 2D plane of the chip floor is gridless or a uniform grid, thereby reflecting on the possible locations of heat sources and the target observation points. The experimental results for both the domains - continuous and discrete, establish that a region, which does not contain any heat source may become hotter than other regions containing thermal sources. Thus a hot zone may appear away from the hotspots, and placing heat sinks on the active thermal sources alone may not suffice to tackle thermal imbalance.
Citation:
S. Majumder, S. Sur-Kolay, S. C. Nandy, B. B. Bhattacharya, B. Chakraborty, "Hot Spots and Zones in a Chip: A Geometrician's View," vlsid, pp.691-696, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005
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