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18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
Revisiting VLSI Interconnects in Deep Sub-Micron: Some Open Questions
Kolkata, India
January 03-January 07
ISBN: 0-7695-2264-5
Parthasarathi Dasgupta, Indian Institute of Management-Calcutta
Deep sub-micron technology has increased the design complexity of VLSI circuits. Design of routers now has to take care of the timing issues for faster design convergence. This has yielded wider scope of research in design and performance of interconnects. We focus on certain critical aspects of interconnects, and related open research issues. The discussions are on (i) the fidelity of delay estimators, and its use in finding global routing trees, (ii) a new class of routing trees, and (iii) the evolution of new metric for interconnect performance measurement.
Citation:
Parthasarathi Dasgupta, "Revisiting VLSI Interconnects in Deep Sub-Micron: Some Open Questions," vlsid, pp.615-620, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005
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