An Active Learning Scheme Using Support Vector Machines for Analog Circuit Feasibility Classification

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	Similar Articles Articles by Mengmeng Ding Articles by Ranga Vemuri

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)

Kolkata, India

January 03-January 07

ISBN: 0-7695-2264-5

	ASCII Text	x
	Mengmeng Ding, Ranga Vemuri, "An Active Learning Scheme Using Support Vector Machines for Analog Circuit Feasibility Classification," VLSI Design, International Conference on, pp. 528-534, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.

	BibTex	x
	@article{ 10.1109/ICVD.2005.47, author = {Mengmeng Ding and Ranga Vemuri}, title = {An Active Learning Scheme Using Support Vector Machines for Analog Circuit Feasibility Classification}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2005}, issn = {1063-9667}, pages = {528-534}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.47}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - An Active Learning Scheme Using Support Vector Machines for Analog Circuit Feasibility Classification SN - 1063-9667 SP528 EP534 A1 - Mengmeng Ding, A1 - Ranga Vemuri, PY - 2005 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Mengmeng Ding, University of Cincinnati

Ranga Vemuri, University of Cincinnati

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.47

This paper presents a new active learning scheme using Support Vector Machines (SVMs) and its application in identifying the feasibility design space of analog circuit. The proposed methodology uses a committee of SVM classifiers to exclude a large portion of the entire design space and samples only the feasibility region and its neighboring. We also introduce three accuracy metrics due to the extreme sparsity of the feasibility design space in the entire design space. Experimental results show that the three accuracy metrics of the final constructed classifier are much better than those of a classifier constructed by a passive learning scheme which samples the entire design space uniform randomly.

Citation:

Mengmeng Ding, Ranga Vemuri, "An Active Learning Scheme Using Support Vector Machines for Analog Circuit Feasibility Classification," vlsid, pp.528-534, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005

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