loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
On-Chip Voltage Regulator with Improved Transient Response
Kolkata, India
January 03-January 07
ISBN: 0-7695-2264-5
ASCII Text
x 
 
Ashis Maity, R. G. Raghavendra, Pradip Mandal, "On-Chip Voltage Regulator with Improved Transient Response," VLSI Design, International Conference on, pp. 522-527, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.
 
 
BibTex
x
 
@article{ 10.1109/ICVD.2005.130,
author = {Ashis Maity and R. G. Raghavendra and Pradip Mandal},
title = {On-Chip Voltage Regulator with Improved Transient Response},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2005},
issn = {1063-9667},
pages = {522-527},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.130},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - On-Chip Voltage Regulator with Improved Transient Response
SN - 1063-9667
SP522
EP527
A1 - Ashis Maity,
A1 - R. G. Raghavendra,
A1 - Pradip Mandal,
PY - 2005
KW - null
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Ashis Maity, Alliance Semiconductor, India
R. G. Raghavendra, Alliance Semiconductor, India
Pradip Mandal, Indian Institute of Technology-Kharagpur
A new technique has been proposed to improve the transient behavior of the on-chip/embedded voltage regulator. It is realized by introducing a dynamic leakage path at the driver stage of voltage regulator. The circuit is implemented in 0.18? CMOS technology and the voltage regulator generates 1.9V from 3.3V supply. The dynamic leaker consumes almost zero power in steady condition, at the same time it improves the transient behavior of the voltage regulator when the load current varies from few hundred mA to close to zero mA momentarily. The dynamic leaker concept proves to be power efficient method over static leaker, especially in low power SRAM applications.
Citation:
Ashis Maity, R. G. Raghavendra, Pradip Mandal, "On-Chip Voltage Regulator with Improved Transient Response," vlsid, pp.522-527, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005
Usage of this product signifies your acceptance of the Terms of Use.