Effects of Technology and Dimensional Scaling on Input Loss Prediction of RF MOSFETs

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	Similar Articles Articles by Tejasvi Das Articles by Clyde Washburn Articles by P. R. Mukund Articles by Steve Howard Articles by Ken Paradis Articles by Jung-Geau Jang Articles by Jan Kolnik Articles by Jeff Burleson

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)

Kolkata, India

January 03-January 07

ISBN: 0-7695-2264-5

	ASCII Text	x
	Tejasvi Das, Clyde Washburn, P. R. Mukund, Steve Howard, Ken Paradis, Jung-Geau Jang, Jan Kolnik, Jeff Burleson, "Effects of Technology and Dimensional Scaling on Input Loss Prediction of RF MOSFETs," VLSI Design, International Conference on, pp. 295-300, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.

	BibTex	x
	@article{ 10.1109/ICVD.2005.86, author = {Tejasvi Das and Clyde Washburn and P. R. Mukund and Steve Howard and Ken Paradis and Jung-Geau Jang and Jan Kolnik and Jeff Burleson}, title = {Effects of Technology and Dimensional Scaling on Input Loss Prediction of RF MOSFETs}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2005}, issn = {1063-9667}, pages = {295-300}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.86}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - Effects of Technology and Dimensional Scaling on Input Loss Prediction of RF MOSFETs SN - 1063-9667 SP295 EP300 A1 - Tejasvi Das, A1 - Clyde Washburn, A1 - P. R. Mukund, A1 - Steve Howard, A1 - Ken Paradis, A1 - Jung-Geau Jang, A1 - Jan Kolnik, A1 - Jeff Burleson, PY - 2005 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Tejasvi Das, Rochester Institute of Technology

Clyde Washburn, Rochester Institute of Technology

P. R. Mukund, Rochester Institute of Technology

Steve Howard, LSI Logic Corporation

Ken Paradis, LSI Logic Corporation

Jung-Geau Jang, National Semiconductor Corporation

Jan Kolnik, LSI Logic Corporation

Jeff Burleson, LSI Logic Corporation

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.86

In this paper, we present the impact of both process and dimensional scaling on input loss (S_11) prediction of MOSFET?s at GHz frequencies. We study the distributed gate effect, the Non-Quasi Static effect, and report a drop in the resistive component of S_11 for larger fingered devices at high frequencies (> 5 GHz). We identify the boundary at which such effects start dominating. A modification to the existing lumped model is presented that tracks this effect with high accuracy. The impact of oxide thickness on S_11 in the same process and across two different processes is also presented. The study was validated with the fabrication of an extensive set of RF dimensioned transistors in LSI Logic?s 0.18 ?m and 0.11 ?m processes, across five different wafers.

Citation:

Tejasvi Das, Clyde Washburn, P. R. Mukund, Steve Howard, Ken Paradis, Jung-Geau Jang, Jan Kolnik, Jeff Burleson, "Effects of Technology and Dimensional Scaling on Input Loss Prediction of RF MOSFETs," vlsid, pp.295-300, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005

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