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18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
Design, Fabrication, Testing and Simulation of Porous Silicon Based Smart MEMS Pressure Sensor
Kolkata, India
January 03-January 07
ISBN: 0-7695-2264-5
ASCII Text
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C. Pramanik, T. Islam, H. Saha, J. Bhattacharya, S. Banerjee, S. Dey, "Design, Fabrication, Testing and Simulation of Porous Silicon Based Smart MEMS Pressure Sensor," VLSI Design, International Conference on, pp. 235-240, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.
 
 
BibTex
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@article{ 10.1109/ICVD.2005.77,
author = {C. Pramanik and T. Islam and H. Saha and J. Bhattacharya and S. Banerjee and S. Dey},
title = {Design, Fabrication, Testing and Simulation of Porous Silicon Based Smart MEMS Pressure Sensor},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2005},
issn = {1063-9667},
pages = {235-240},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.77},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - Design, Fabrication, Testing and Simulation of Porous Silicon Based Smart MEMS Pressure Sensor
SN - 1063-9667
SP235
EP240
A1 - C. Pramanik,
A1 - T. Islam,
A1 - H. Saha,
A1 - J. Bhattacharya,
A1 - S. Banerjee,
A1 - S. Dey,
PY - 2005
KW - null
VL - 0
JA - VLSI Design, International Conference on
ER -
 
C. Pramanik, Jadavpur University
T. Islam, Jadavpur University
H. Saha, Jadavpur University
J. Bhattacharya, Indian Institute of Technology-Kharagpur
S. Banerjee, Indian Institute of Technology-Kharagpur
S. Dey, University of Texas at Austin
Porous silicon based piezoresistive pressure sensor has been designed, fabricated and tested in the range of 0 to 1 bar and temperature range of 20° C to 80° C. A suitable signal conditioning analog circuit consisting of constant current generator and an offset adjustable low noise instrumentation amplifier has been designed and tested. The analog output is then digitized through an ADC and fed to FPGA. Architecture for compensation of nonlinear temperature dependence of pressure sensor has been implemented and tested in FPGA. A device model of porous silicon pressure sensor has also been developed with a view to realize a SMART pressure sensor.
Citation:
C. Pramanik, T. Islam, H. Saha, J. Bhattacharya, S. Banerjee, S. Dey, "Design, Fabrication, Testing and Simulation of Porous Silicon Based Smart MEMS Pressure Sensor," vlsid, pp.235-240, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005
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