A Low Power Reprogrammable Parallel Processing VLSI Architecture for Computation of B-Spline Based Medical Image Processing System for Fast Characterization of Tiny Objects Suspended in Cellular Fluid

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	Similar Articles Articles by Sabyasachi Mondal Articles by Arijit De Articles by P. K. Biswas

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)

Kolkata, India

January 03-January 07

ISBN: 0-7695-2264-5

	ASCII Text	x
	Sabyasachi Mondal, Arijit De, P. K. Biswas, "A Low Power Reprogrammable Parallel Processing VLSI Architecture for Computation of B-Spline Based Medical Image Processing System for Fast Characterization of Tiny Objects Suspended in Cellular Fluid," VLSI Design, International Conference on, pp. 147-152, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.

	BibTex	x
	@article{ 10.1109/ICVD.2005.17, author = {Sabyasachi Mondal and Arijit De and P. K. Biswas}, title = {A Low Power Reprogrammable Parallel Processing VLSI Architecture for Computation of B-Spline Based Medical Image Processing System for Fast Characterization of Tiny Objects Suspended in Cellular Fluid}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2005}, issn = {1063-9667}, pages = {147-152}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.17}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - A Low Power Reprogrammable Parallel Processing VLSI Architecture for Computation of B-Spline Based Medical Image Processing System for Fast Characterization of Tiny Objects Suspended in Cellular Fluid SN - 1063-9667 SP147 EP152 A1 - Sabyasachi Mondal, A1 - Arijit De, A1 - P. K. Biswas, PY - 2005 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Sabyasachi Mondal, Indian Institute of Technology-Kharagpur

Arijit De, Indian Institute of Technology-Kharagpur

P. K. Biswas, Indian Institute of Technology-Kharagpur

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.17

In this paper a novel medical image processing system is discussed. The core of the system is developed using a 16-bit fixed-point parallel architecture B-Spline signal processing system. The statistical measure of finite word length effect is analytically developed. A modified algorithm for the reduced hardware reprogrammable interpolator has been designed. Finally some suitable modification in the hardware is made to reduce the power consumption.

Citation:

Sabyasachi Mondal, Arijit De, P. K. Biswas, "A Low Power Reprogrammable Parallel Processing VLSI Architecture for Computation of B-Spline Based Medical Image Processing System for Fast Characterization of Tiny Objects Suspended in Cellular Fluid," vlsid, pp.147-152, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005

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