18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems
Kolkata, India
January 03-January 07
ISBN: 0-7695-2264-5
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system components and routing of system communication affect system performance and power consumption. This research provides a heuristic to determine the neighborhood configuration for each component. By controlling the communication bandwidth allocation, simulation results with synthetic and real workloads indicate that our heuristic is able to control the peak power consumption, but at cost of throughput degradation.
Citation:
Praveen Bhojwani, Rabi Mahapatra, Eun Jung Kim, Thomas Chen, "A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems," vlsid, pp.124-129, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005