An Optically Differential Reconfigurable Gate Array with a partial reconfiguration optical system and its power consumption estimation

V
VLSID
2004
17th International Conference on VLSI Design
Abstract - An Optically Differential Reconfigurable Gate Array with a partial reconfiguration optical system and its power consumption estimation

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	Similar Articles Articles by Minoru Watanabe Articles by Fuminori Kobayashi

17th International Conference on VLSI Design

Mumbai, India

January 05-January 09

ISBN: 0-7695-2072-3

	ASCII Text	x
	Minoru Watanabe, Fuminori Kobayashi, "An Optically Differential Reconfigurable Gate Array with a partial reconfiguration optical system and its power consumption estimation," VLSI Design, International Conference on, pp. 735, 17th International Conference on VLSI Design, 2004.

	BibTex	x
	@article{ 10.1109/ICVD.2004.1261015, author = {Minoru Watanabe and Fuminori Kobayashi}, title = {An Optically Differential Reconfigurable Gate Array with a partial reconfiguration optical system and its power consumption estimation}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2004}, issn = {1063-9667}, pages = {735}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2004.1261015}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - An Optically Differential Reconfigurable Gate Array with a partial reconfiguration optical system and its power consumption estimation SN - 1063-9667 SP EP A1 - Minoru Watanabe, A1 - Fuminori Kobayashi, PY - 2004 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Minoru Watanabe, Kyushu Institute of Technology

Fuminori Kobayashi, Kyushu Institute of Technology

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2004.1261015

This paper proposes an optically differential reconfigurable gate array (ODRGA) with a partial reconfiguration optical system. The ODRGA not only realizes a partial reconfiguration capability; it also reduces the amount of memory required to store reconfiguration contexts while reducing optical reconfiguration power consumption. This paper presents ODRGA-VLSI, which is available for a partial reconfiguration technique. Advantages of reducing the amount of memory and power consumption are estimated theoretically and compared with a conventional optically reconfigurable gate array.

Citation:

Minoru Watanabe, Fuminori Kobayashi, "An Optically Differential Reconfigurable Gate Array with a partial reconfiguration optical system and its power consumption estimation," vlsid, pp.735, 17th International Conference on VLSI Design, 2004

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