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17th International Conference on VLSI Design
On-chip testing of embedded transducers
Mumbai, India
January 05-January 09
ISBN: 0-7695-2072-3
S. Mir, TIMA Laboratory
L. Rufer, TIMA Laboratory
B. Courtois, TIMA Laboratory
System-on-Chip (SoC) technologies are evolving towards the integration of highly heterogeneous devices, including hardware of a different nature, such as digital, analogue and mixed-signal, together with software components. Embedding transducers, as predicted by technology roadmaps, is yet another step in this continuous search for higher levels of integration and miniaturisation. Embedded transducers fabricated with Silicon/CMOS compatible technologies may have a lower performance than transducers fabricated with fully dedicated technologies. However, they offer the Industry the possibility of providing low cost applications for very large market niches, while still keeping the required transducer sensitivity. This is the case, for example, for accelerometers or CMOS imagers. Test technology for SoC devices is rapidly maturing. Yet many difficulties still remain, in particular for addressing the test of analogue and mixed-signal parts. Embedded transducers can be seen as analogue components. But given the fact that they work with signals other than electrical, the test of these parts is even harder to study. In this paper, we will present our work in the field of MEMS testing and its evolution towards transducer on-chip testing.
Index Terms:
MEMS, failure mechanisms, defects, fault modeling, fault simulation, A-HDL, self-test
Citation:
S. Mir, L. Rufer, B. Courtois, "On-chip testing of embedded transducers," vlsid, pp.463, 17th International Conference on VLSI Design, 2004
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