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17th International Conference on VLSI Design
Profiling Driven Computation Reuse: An Embedded Software Synthesis Technique for Energy and Performance Optimization
Mumbai, India
January 05-January 09
ISBN: 0-7695-2072-3
Weidong Wang, Princeton University, Princeton, NJ
Anand Raghunathan, NEC USA, Princeton, NJ
Niraj K. Jha, Princeton University, NJ
It has been observed that even highly optimized software programs perform "redundant" computations during their execution, due to the nature (statistics) of the values assumed by input or internal program variables. For embedded software running on battery-powered systems, such computations can be viewed as unnecessary energy overheads, and hence represent opportunities for improvement in energy efficiency. We present a systematic methodology to identify and eliminate redundancies in the computations performed by embedded software programs, by exploiting opportunities that dynamically arise for computation reuse. We report the results of experiments on two different embedded systems - a detailed simulation model of a Fujitsu SPARClite based embedded system, and actual current measurements on a Compaq iPAQ PDA. Our results demonstrate that the proposed technique can reduce energy by up to 46.9% (average of 21.2% and 13.9% for the SPARClite based system and the iPAQ, respectively) while simultaneously improving performance by up to 45.8% (average of 20.7% and 16.8% for the SPARClite based system and the iPAQ, respectively), compared to well-optimized programs that do not employ such a technique.
Citation:
Weidong Wang, Anand Raghunathan, Niraj K. Jha, "Profiling Driven Computation Reuse: An Embedded Software Synthesis Technique for Energy and Performance Optimization," vlsid, pp.267, 17th International Conference on VLSI Design, 2004
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