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17th International Conference on VLSI Design
On Design and Implementation of an Embedded Automatic Speech Recognition System
Mumbai, India
January 05-January 09
ISBN: 0-7695-2072-3
Sujay Phadke, Indian Institute of Technology, Bombay
Rhishikesh Limaye, Indian Institute of Technology, Bombay
Siddharth Verma, Indian Institute of Technology, Bombay
Kavitha Subramanian, Indian Institute of Technology, Bombay
We present a new design of an Embedded Speech Recognition System. It combines the aspects of both hardware and software design to implement a speaker dependent, isolated word, small vocabulary speech recognition system. The feature extraction is based on modified Mel-scaled Frequency Cepstral Coefficients (MFCC) and template matching employs Dynamic Time Warping (DTW). A novel algorithm has been used to improve the detection of start of a word. The hardware is built around the industry standard TMS320LF2407A DSP. The board is designed to serve as a general purpose DSP development board for the 24X series of TI DSPs. It contains, apart from the DSP, the external SRAM, FLASH, ADC interface, I/O interfacing blocks and JTAG interface. Both the hardware and the software have been designed concurrently, with a view to achieve high-speed recognition with maximum accuracy in minimum power and making the device portable. The proposed solution is a low-cost, high-performance, scalable alternative to other existing products.
Citation:
Sujay Phadke, Rhishikesh Limaye, Siddharth Verma, Kavitha Subramanian, "On Design and Implementation of an Embedded Automatic Speech Recognition System," vlsid, pp.127, 17th International Conference on VLSI Design, 2004
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