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16th International Conference on VLSI Design
Narrow Band Noise Suppression Scheme for improving Signal to Noise Ratio
New Delhi, India
January 04-January 08
ISBN: 0-7695-1868-0
ASCII Text
x 
 
Anantha Nag, K. Radhakrishna Rao, "Narrow Band Noise Suppression Scheme for improving Signal to Noise Ratio," VLSI Design, International Conference on, pp. 25, 16th International Conference on VLSI Design, 2003.
 
 
BibTex
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@article{ 10.1109/ICVD.2003.1183110,
author = {Anantha Nag and K. Radhakrishna Rao},
title = {Narrow Band Noise Suppression Scheme for improving Signal to Noise Ratio},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2003},
issn = {1063-9667},
pages = {25},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183110},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - Narrow Band Noise Suppression Scheme for improving Signal to Noise Ratio
SN - 1063-9667
SP
EP
A1 - Anantha Nag,
A1 - K. Radhakrishna Rao,
PY - 2003
KW - null
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Anantha Nag, Indian Institute of Technology Madras
K. Radhakrishna Rao, Indian Institute of Technology Madras
In mixed signal systems, a weak signal is buried in strong interferer. The signal to noise ratio is poor. To convert the signal to digital, the dynamic range of the analog to digital converter cannot be efficiently utilized. The interference has to be reduced before the conversion. A notch filter can remove this interference. To allow for the uncertainty of frequency of interference, process variations and ageing of components, it has to be selfcorrecting. This paper presents a scheme that improves the signal to noise ratio. This system will form the front end of any mixed mode system where the signal is known to be buried in narrowband noise. Self-tuned notch filter has two parts: a tunable notch filter, a transconductor implementation of the universal active filter and a control circuit. This has been implemented on a 0.35?m CMOS technology.
Citation:
Anantha Nag, K. Radhakrishna Rao, "Narrow Band Noise Suppression Scheme for improving Signal to Noise Ratio," vlsid, pp.25, 16th International Conference on VLSI Design, 2003
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