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16th International Conference on VLSI Design
New Delhi, India
January 04-January 08
ISBN: 0-7695-1868-0
ASCII Text
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Dr. Ramesh Chandra, Dr. Preeti Ranjan Panda, Dr. Joerg Henkel, Dr. Sri Parameswaran, Dr. Loganath Ramachandran, "Specification and Design of Multi-Million Gate SOCs," VLSI Design, International Conference on, pp. 18, 16th International Conference on VLSI Design, 2003.
 
 
BibTex
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@article{ 10.1109/ICVD.2003.1183107,
author = {Dr. Ramesh Chandra and Dr. Preeti Ranjan Panda and Dr. Joerg Henkel and Dr. Sri Parameswaran and Dr. Loganath Ramachandran},
title = {Specification and Design of Multi-Million Gate SOCs},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2003},
issn = {1063-9667},
pages = {18},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183107},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - VLSI Design, International Conference on
TI - Specification and Design of Multi-Million Gate SOCs
SN - 1063-9667
SP
EP
A1 - Dr. Ramesh Chandra,
A1 - Dr. Preeti Ranjan Panda,
A1 - Dr. Joerg Henkel,
A1 - Dr. Sri Parameswaran,
A1 - Dr. Loganath Ramachandran,
PY - 2003
KW - null
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Dr. Ramesh Chandra, ST Microelectronics
Dr. Preeti Ranjan Panda, Indian Inst. of Technology
Dr. Sri Parameswaran, Univ. of New South Wales
Dr. Loganath Ramachandran, Synopsys, Inc.
Recent advances in semiconductor technology have made it possible to integrate multi million transistors on a single chip, design and verification teams face several challenges managing the complexity. Some of these challenges include, specification and verification at the functional level, closing early on the system level architecture, extensive simulations of the hardware and software components and finalizing the path to implementation of the entire SOC.
Citation:
Dr. Ramesh Chandra, Dr. Preeti Ranjan Panda, Dr. Joerg Henkel, Dr. Sri Parameswaran, Dr. Loganath Ramachandran, "Specification and Design of Multi-Million Gate SOCs," vlsid, pp.18, 16th International Conference on VLSI Design, 2003
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