ASP-DAC/VLSI Design 2002 A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication Bangalore, India January 07-January 11 ISBN: 0-7695-1441-3
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for next-generation appliances capable of wireless image communication. One of the major bottlenecks in enabling wireless image communication is the high energy requirement, which may surpass the current and future capabilities of battery technologies. Past studies have shown that the bottlenecks can be overcome by developing adaptive multimedia compression algorithms which can adapt to dynamic channel conditions and service requirements {tyrh00,taylor01}.In this paper, we present an application-specific hardware/software reconfigurable architecture to support adaptive image compression algorithms. We present a design methodology which considers co-design between adaptive algorithms and architectural design leading to a reconfigurable architecture for image compression algorithms. Co-design of the proposed architecture aims not only at performance and power efficient implementation, but also towards fast and efficient run-time adaptation of an adaptive image compression algorithm. Finally, we present experimental results demonstrating that the proposed architecture provides a low cost (performance, energy) implementation for the adaptive image compression algorithm, and necessary run-time adaptation to current wireless conditions and requirements with very low overhead.
Index Terms:
Adaptive, reconfigurable architecture, image compression, wireless multimedia
Citation:
Debashis Panigrahi, Clark N. Taylor, Sujit Dey, "A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication," vlsid, pp.553, ASP-DAC/VLSI Design 2002, 2002 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||