The 31st Annual Simulation Symposium An Efficient Compiled Simulation System for VLIW Code Verification Boston, Massachusetts April 05-April 09 ISBN: 0-8186-8418-6
We present an efficient compiled simulation system for the verification of a VLIW instruction set architecture and its assembly code. Our existing compiled simulation system is made to be faster by adopting incremental recompilation and C-assembly cosimulation techniques to improve the conventional compiled simulation. As a part of SPARC-based VLIW testbed, the efficiency and validity of our compiled simulation system are verified with three SPEC '89 integer bench- marks and several UNIX utilities.
Citation:
Jae-Woo Ahn, Soo-Mook Moon, Wonyong Sung, "An Efficient Compiled Simulation System for VLIW Code Verification," ss, pp.91, The 31st Annual Simulation Symposium, 1998 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||