28th Annual Simulation Symposium
A simulator for real-time parallel processing architectures
Santa Barbara, California
April 25-April 28
ISBN: 0-8186-7091-6
A time-driven, flit-based, wormhole-routed, parallel processor network simulator has been designed in C with a user-friendly graphical user interface (GUI). To accommodate the unique requirements of real-time networks, the simulator is based on prioritized queues supporting various resource allocation policies. In the simulator, special care is taken to prevent various possible kinds of overlaps (in time) and deadlocks. As a consequence of real-time systems, all messages are associated with priorities and every virtual channel is associated with the priority of the message it stores. The simulator contains a simple test for the convergence of the average latency, and the throughput is always monitored to verify that it converges to the applied load. A candidate network function is accurately defined and this characterization is detailed enough to be simulated. The simulator is used to evaluate a set of communication characteristics that are deemed desirable for real-time parallel processors with respect to performance.
Index Terms:
parallel architectures; real-time systems; virtual machines; resource allocation; convergence; concurrency control; graphical user interfaces; real-time parallel processing architectures; time-driven flit-based wormhole-routed parallel processor network simulator; user-friendly graphical user interface; real-time networks; prioritized queues; resource allocation policies; overlaps; deadlocks; message priorities; virtual channel; average latency convergence; throughput monitoring; communication characteristics; performance
Citation:
A. Saha, "A simulator for real-time parallel processing architectures," ss, pp.74, 28th Annual Simulation Symposium, 1995