The complete definition of a Neuro-Symbolic Language, partially introduced in [1], for monotonic and non-monotonic logical inference by means of artificial neural networks (ANNs) is presented. Both the language and its compiler have been designed and implemented. It has been shown that the ANN model here adopted (NFC - Neural Forward Chaining[2]) is a massively parallel abstract interpreter of definite logic programs; moreover, inhibition is used to implement a neural form of logical negation. Previous compiler for translating the neural representation of a given problem into a VHDL software, which in turn can set electornic device like FPGA, has been modified to fit the new and more complete features of the language.