This paper describe the electronic realization of a recently proposed recurrent neural network for solving simultaneous linear equations which can be found in many mathematical model formulations. In many large-scale problems, the number of unknowns involved is very large. These large-scale problems often need to be solved in real-time. In this study, a systolic array is proposed that provides linear speedup over sequential execution on a single processor machine. The systolic array is based on a ring topology and synchronous execution, allowing for the use of a single controller for all processing elements. The architecture proposed has been implemented on field programmable gate arrays and verified. Issue such as architecture design and implementation are discussed, and initial testing results are also included.