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15th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'03)
Enabling Dual-Core Mode in BlueGene/L: Challenges and Solutions
S?o Paulo, SP - Brazil
November 10-November 12
ISBN: 0-7695-2046-4
ASCII Text
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George Almási, Leonardo R. Bachega, Siddhartha Chatterjee, Manish Gupta, Derek Lieber, Xavier Martorell, José E. Moreira, "Enabling Dual-Core Mode in BlueGene/L: Challenges and Solutions," Computer Architecture and High Performance Computing, Symposium on, pp. 19, 15th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'03), 2003.
 
 
BibTex
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@article{ 10.1109/CAHPC.2003.1250317,
author = {George Almási and Leonardo R. Bachega and Siddhartha Chatterjee and Manish Gupta and Derek Lieber and Xavier Martorell and José E. Moreira},
title = {Enabling Dual-Core Mode in BlueGene/L: Challenges and Solutions},
journal ={Computer Architecture and High Performance Computing, Symposium on},
volume = {0},
year = {2003},
isbn = {0-7695-2046-4},
pages = {19},
doi = {http://doi.ieeecomputersociety.org/10.1109/CAHPC.2003.1250317},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Computer Architecture and High Performance Computing, Symposium on
TI - Enabling Dual-Core Mode in BlueGene/L: Challenges and Solutions
SN - 0-7695-2046-4
SP
EP
A1 - George Almási,
A1 - Leonardo R. Bachega,
A1 - Siddhartha Chatterjee,
A1 - Manish Gupta,
A1 - Derek Lieber,
A1 - Xavier Martorell,
A1 - José E. Moreira,
PY - 2003
KW - null
VL - 0
JA - Computer Architecture and High Performance Computing, Symposium on
ER -
 
George Almási, IBM T. J. Watson Research Center
Leonardo R. Bachega, IBM T. J. Watson Research Center
Siddhartha Chatterjee, IBM T. J. Watson Research Center
Manish Gupta, IBM T. J. Watson Research Center
Derek Lieber, IBM T. J. Watson Research Center
Xavier Martorell, IBM T. J. Watson Research Center
José E. Moreira, IBM T. J. Watson Research Center
BlueGene/L is a massively parallel computer system with 65,536 dual-processor compute nodes. The peak performance of BlueGene/L is in excess of 360 TFLOP/s if both processor cores in a node are used for computation. The main challenge of deploying this dual-core mode of operation is that the L1 caches in each core are not hardware coherent. This forces a software-based approach to cache coherence and guides our design of a programming model for dual-core mode. In this paper, we describe the design, implementation, and performance evaluation of system software for enabling the use of dual-core mode on Blue-Gene/L. Our preliminary performance results show that our approach to dual-core mode is effective for key numerical kernels.
Citation:
George Almási, Leonardo R. Bachega, Siddhartha Chatterjee, Manish Gupta, Derek Lieber, Xavier Martorell, José E. Moreira, "Enabling Dual-Core Mode in BlueGene/L: Challenges and Solutions," sbac-pad, pp.19, 15th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'03), 2003
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