loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
14th Symposium on Computer Architecture and High Performance Computing (SCAB-PAD'02)
Instruction Usage and the Memory Gap Problem
Vit?ria, ES, Brazil
October 28-October 30
ISBN: 0-7695-1772-2
The gap between memory and processor speeds is responsible for the substantial amount of idle time of current processors. To reduce the impact provoked by the so-called "memory gap problem," many software techniques (e.g., the code layout reorganization) together with hardware mechanisms (cache memory, translation look-aside buffer, branch prediction, speculative execution, trace cache, instruction reuse, and so on) have been successfully implemented.
In this paper we present some experiments that explain why these mechanisms and techniques are so efficient. We found that only a small fraction of the object code is actually executed: our experiments disclosed that more than 50% of the instructions remain untouched during the whole execution, and the percentages of basic blocks which remain unused are slightly greater.
In addition to the usage of instructions and blocks, the paper provides further insights regarding the behavior of application programs, and gives some suggestions for extra performance gains.
Citation:
E. Fernandes, V. Barbosa, F. Ramos, "Instruction Usage and the Memory Gap Problem," sbac-pad, pp.0169, 14th Symposium on Computer Architecture and High Performance Computing (SCAB-PAD'02), 2002
Usage of this product signifies your acceptance of the Terms of Use.