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14th Symposium on Computer Architecture and High Performance Computing (SCAB-PAD'02)
Instruction Set Extension for Long Integer Modulo Arithmetic on RISC-Based Smart Cards
Vit?ria, ES, Brazil
October 28-October 30
ISBN: 0-7695-1772-2
Modulo multiplication of long integers (≥1024 bits) is the major operation of many public-key cryptosystems like RSA or Diffie-Hellman. The efficient implementation of modulo arithmetic is a challenging task, in particular on smart cards due to their constrained resources and relatively slow clock frequency. In this paper we present the concept of an application-specific instruction set extension (ISE) for long integer arithmetic. We introduce an optimized multiply-and-accumulate (MAC) unit that makes it possible to compute a × b+c+d with only one instruction, whereby a; b; c; d are single-precision words (unsigned integers). This additional instruction is simple to incorporate into common RISC architectures like the MIPS32. Experimental results show that the inner-product operation of a multiple-precision multiplication can be accelerated by a factor of two without increasing the processor?s clock frequency. We also estimate the execution time of a 1024-bit modulo exponentiation assuming that this special MAC instruction was made avail-able. The proposed ISE is an alternative solution to a crypto co-processor, especially for multi-application smart cards (e.g., Java cards) with an embedded 32-bit RISC core.
Citation:
J. Großschädl, "Instruction Set Extension for Long Integer Modulo Arithmetic on RISC-Based Smart Cards," sbac-pad, pp.0013, 14th Symposium on Computer Architecture and High Performance Computing (SCAB-PAD'02), 2002
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