Real-time scheduling in a programmable radar signal processor

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Fourth International Workshop on Real-Time Computing Systems and Applications (RTCSA'97)

Taipei, TAIWAN

October 27-October 29

ISBN: 0-8186-8073-3

	ASCII Text	x
	Cheng Chang, Chien-Chung Chen, Yao-Liang Chen, Fu-Shin Huang, "Real-time scheduling in a programmable radar signal processor," Real-Time Computing Systems and Applications, International Workshop on, pp. 206, Fourth International Workshop on Real-Time Computing Systems and Applications (RTCSA'97), 1997.

	BibTex	x
	@article{ 10.1109/RTCSA.1997.629225, author = {Cheng Chang and Chien-Chung Chen and Yao-Liang Chen and Fu-Shin Huang}, title = {Real-time scheduling in a programmable radar signal processor}, journal ={Real-Time Computing Systems and Applications, International Workshop on}, volume = {0}, year = {1997}, isbn = {0-8186-8073-3}, pages = {206}, doi = {http://doi.ieeecomputersociety.org/10.1109/RTCSA.1997.629225}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Real-Time Computing Systems and Applications, International Workshop on TI - Real-time scheduling in a programmable radar signal processor SN - 0-8186-8073-3 SP EP A1 - Cheng Chang, A1 - Chien-Chung Chen, A1 - Yao-Liang Chen, A1 - Fu-Shin Huang, PY - 1997 KW - radar signal processing; real-time scheduling; programmable radar signal processor; processing speed; parallel multi-processor architecture; digital signal processing; real-time scheduling algorithm VL - 0 JA - Real-Time Computing Systems and Applications, International Workshop on ER -

Cheng Chang, Chung Shan Inst. of Sci. & Technol., Lung-Tan, Taiwan

Chien-Chung Chen, Chung Shan Inst. of Sci. & Technol., Lung-Tan, Taiwan

Yao-Liang Chen, Chung Shan Inst. of Sci. & Technol., Lung-Tan, Taiwan

Fu-Shin Huang, Chung Shan Inst. of Sci. & Technol., Lung-Tan, Taiwan

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/RTCSA.1997.629225

The new trend of designing radar digital signal processors is not only to improve their processing speed by adopting the parallel multi-processor architecture but also to make their infrastructure flexible so that one generic digital signal processor framework can be applied to a variety of different radar systems. The key technology to make such radar digital signal processor architecture programmable, or flexible, is the scheduler which manages resources of digital signal processing in real-time according to system requirements. In this paper, the architecture of the programmable radar signal processor (PRSP) is presented, and a real-time scheduling algorithm used in PRSP is thoroughly discussed.

Index Terms:

radar signal processing; real-time scheduling; programmable radar signal processor; processing speed; parallel multi-processor architecture; digital signal processing; real-time scheduling algorithm

Citation:

Cheng Chang, Chien-Chung Chen, Yao-Liang Chen, Fu-Shin Huang, "Real-time scheduling in a programmable radar signal processor," rtcsa, pp.206, Fourth International Workshop on Real-Time Computing Systems and Applications (RTCSA'97), 1997

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