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10th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'04)
Implementing Pfairness on a Symmetric Multiprocessor
Toronto, Canada
May 25-May 28
ISBN: 0-7695-2148-7
ASCII Text
x 
 
Philip Holman, James H. Anderson, "Implementing Pfairness on a Symmetric Multiprocessor," Real-Time and Embedded Technology and Applications Symposium, IEEE, pp. 544, 10th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'04), 2004.
 
 
BibTex
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@article{ 10.1109/RTTAS.2004.1317302,
author = {Philip Holman and James H. Anderson},
title = {Implementing Pfairness on a Symmetric Multiprocessor},
journal ={Real-Time and Embedded Technology and Applications Symposium, IEEE},
volume = {0},
year = {2004},
issn = {1080-1812},
pages = {544},
doi = {http://doi.ieeecomputersociety.org/10.1109/RTTAS.2004.1317302},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Real-Time and Embedded Technology and Applications Symposium, IEEE
TI - Implementing Pfairness on a Symmetric Multiprocessor
SN - 1080-1812
SP
EP
A1 - Philip Holman,
A1 - James H. Anderson,
PY - 2004
KW - null
VL - 0
JA - Real-Time and Embedded Technology and Applications Symposium, IEEE
ER -
 
Philip Holman, University of North Carolina, Chapel Hill, NC
James H. Anderson, University of North Carolina, Chapel Hill, NC
We consider the implementation of a Pfair scheduler on a symmetric multiprocessor (SMP). Simulations presented herein suggest that bus contention resulting from simultaneous scheduling decisions can substantially degrade performance. To correct this problem, we propose a staggered model for Pfair scheduling under which scheduling points are uniformly distributed over time.
Citation:
Philip Holman, James H. Anderson, "Implementing Pfairness on a Symmetric Multiprocessor," rtas, pp.544, 10th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'04), 2004
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