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10th Pacific Rim International Symposium on Dependable Computing (PRDC'04)
Fault-Tolerant Message Switching Based on Wormhole Switching and Backtracking
Papeete, Tahiti, French Polynesia
March 03-March 05
ISBN: 0-7695-2076-6
Manabu Sueishi, Chiba University
Masato Kitakami, Chiba University
Hideo Ito, Chiba University

Parallel computers are now popularly applied to applications where many calculations are required. In a NO Remote memory Access model (NORA) parallel computer, many processors are connected by communication links and calculation results are obtained by communications among processors. The message switching method, which controls message transmission in the parallel computer, is one of the most important parameters to improve the performance of the parallel computer. Since parallel computers include many processors, its failure rate is very high and many fault-tolerant switching methods have been proposed. The existing methods have problems, however, such as low communication throughput, low fault-tolerant capability, and large hardware overhead.

This paper proposes fault-tolerant switching by improving wormhole switching. The proposed method inserts dummy flits, having no information, after the header flit, the first flit of the packet. By overwriting the header flit to the dummy flit, backtracking is implemented without hardware overhead. Computer simulation says that in a 16 by 16 2D torus, for example, the throughput of the proposed method is almost equal to that of existing methods which require large hardware overhead if the number of the faulty nodes is less then 40.

Citation:
Manabu Sueishi, Masato Kitakami, Hideo Ito, "Fault-Tolerant Message Switching Based on Wormhole Switching and Backtracking," prdc, pp.183-190, 10th Pacific Rim International Symposium on Dependable Computing (PRDC'04), 2004
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