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International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04)
A Tool for Exploring the Large Scale Signal Processing Systems Specification
Dresden, Germany
September 07-September 10
ISBN: 0-7695-2080-4
Sylvain Alliot, ASTRON, Netherlands
Laurentiu Nicolae, Leiden University, Netherlands
Martijn van Veelen, ASTRON, Netherlands
Large scale and/or distributed embedded system designs are hierarchies of platforms executing massively parallel processes. To design such systems one must follow multi level requirements to specification steps jointly in the application and architecture domains. These can not be anticipated and compared without assistance. We present here an exploration tool for such systems, which facilitates a novel approach for the evaluation of architectures based on the reuse of accumulated design knowledge. The tool bridges multiple domain entries: the topology, the mapping, the system constraints and the hardware components. A parameterized model of the system is built and later instantiated for different specification scenarios. Various user interfaces are provided to ease the different views on the specification and data entries. This information is passed on to an object oriented model for performance/cost analysis.
Citation:
Sylvain Alliot, Laurentiu Nicolae, Martijn van Veelen, "A Tool for Exploring the Large Scale Signal Processing Systems Specification," parelec, pp.341-348, International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04), 2004
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