International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04) Associative Graph Processor and Its Properties Dresden, Germany September 07-September 10 ISBN: 0-7695-2080-4
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PCEE.2004.15
In this paper a model of a versatile associative graph processor called AGP is proposed. The model can work both in bit-serial and in bit-parallel mode and enables simultaneous search for a set of comparands and selection of the search types. In addition it has some built-in operations designed for associative graph algorithms. The selected functions and basic procedures of this model are described and its possible architecture is discussed.
Index Terms:
associative parallel processor, bit-parallel processing, associative graph processing, multiple-search
Citation:
Anna Nepomniaschaya, Zbigniew Kokosinski, "Associative Graph Processor and Its Properties," parelec, pp.297-302, International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||