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International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04)
Computing Passive Reduced-Order Models for Circuit Simulation
Dresden, Germany
September 07-September 10
ISBN: 0-7695-2080-4
Peter Benner, Technische Universit?t Chemnitz, Germany
Enrique S. Quintana-Ort?, Universidad Jaume I, Spain
Gregorio Quintana-Ort?, Universidad Jaume I, Spain
We investigate numerical methods for passive model reduction of linear dynamical systems. This is an important task in circuit simulation when modeling parasitic effects of interconnect. We will show how positive real balancing, based on balancing the solutions of two algebraic Riccati equations, can be used for passive model reduction of large-scale systems on parallel computers. Numerical experiments demonstrate the performance of the parallel algorithms using several examples from circuit simulation.
Citation:
Peter Benner, Enrique S. Quintana-Ort?, Gregorio Quintana-Ort?, "Computing Passive Reduced-Order Models for Circuit Simulation," parelec, pp.146-151, International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04), 2004
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