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International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04)
A Modified Vertex Method for Parallelization of Arbitrary Nested Loops
Dresden, Germany
September 07-September 10
ISBN: 0-7695-2080-4
W. Bielecki, Technical University of Szczecin, Poland
R. Kocisz, Technical University of Szczecin, Poland
A technique, permitting us to linearize constraints formed to find affine schedules for arbitrary nested loops, is presented. The main advantage of this technique is that it does not require finding the polytope vertices and results in the fewer number of inequalities and equalities than that yielded with the vertex technique. Affine schedules found are valid for the arbitrary positive lower and upper loop bounds. Experiments with the Livermore loops are discussed. The restriction of the technique and tasks for future research are discussed.
Citation:
W. Bielecki, R. Kocisz, "A Modified Vertex Method for Parallelization of Arbitrary Nested Loops," parelec, pp.91-96, International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04), 2004
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