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International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04)
Matrix Multiplication Performance on Commodity Shared-Memory Multiprocessors
Dresden, Germany
September 07-September 10
ISBN: 0-7695-2080-4
G. Tsilikas, University of Essex, UK
M. Fleury, University of Essex, UK
Cache-oblivious algorithms for matrix multiplication are confirmed as an effective way of exploiting Intel architecture shared-memory multiprocessors. The performance also remains consistent across a wide range of matrix size. The Cilk programming environment remains an effective way of implementing this type of algorithm, but the need for portability and a compiler upgrade route mean that a portability library is a competitive alternative. The paper considers the interaction of matrix multiplication algorithms with the memory hierarchy, as well as multithreading across differing operating system variants and compilers.
Citation:
G. Tsilikas, M. Fleury, "Matrix Multiplication Performance on Commodity Shared-Memory Multiprocessors," parelec, pp.13-18, International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04), 2004
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