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International Conference on Parallel Computing in Electrical Engineering (PARELEC'02)
Integrating Fault-Tolerant Feature into TOPAS Parallel Programming Environment for Distributed Systems
Warsaw, Poland
September 22-September 25
ISBN: 0-7695-1730-7
ASCII Text
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G. T. Nguyen, V. D. Tran, M. Kotocova, "Integrating Fault-Tolerant Feature into TOPAS Parallel Programming Environment for Distributed Systems," Parallel Computing in Electrical Engineering, International Conference on, pp. 157, International Conference on Parallel Computing in Electrical Engineering (PARELEC'02), 2002.
 
 
BibTex
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@article{ 10.1109/PCEE.2002.1115228,
author = {G. T. Nguyen and V. D. Tran and M. Kotocova},
title = {Integrating Fault-Tolerant Feature into TOPAS Parallel Programming Environment for Distributed Systems},
journal ={Parallel Computing in Electrical Engineering, International Conference on},
volume = {0},
year = {2002},
isbn = {0-7695-1730-7},
pages = {157},
doi = {http://doi.ieeecomputersociety.org/10.1109/PCEE.2002.1115228},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Parallel Computing in Electrical Engineering, International Conference on
TI - Integrating Fault-Tolerant Feature into TOPAS Parallel Programming Environment for Distributed Systems
SN - 0-7695-1730-7
SP
EP
A1 - G. T. Nguyen,
A1 - V. D. Tran,
A1 - M. Kotocova,
PY - 2002
KW - null
VL - 0
JA - Parallel Computing in Electrical Engineering, International Conference on
ER -
 
G. T. Nguyen, Slovak Academy of Sciences
V. D. Tran, Slovak Academy of Sciences
M. Kotocova, FEI STU
In this paper, TOPAS1 — a new parallel programming environment for distributed systems — is presented. TOPAS automatically analyzes data dependence among tasks and synchronizes data, which reduces the time needed for parallel program developments. TOPAS also provides supports for scheduling, dynamic load balancing and fault tolerance. Experiments show simplicity and efficiency of parallel programming in TOPAS environment with fault-tolerant integration, which provides graceful performance degradation and quick reconfiguration time for application recovery.
Citation:
G. T. Nguyen, V. D. Tran, M. Kotocova, "Integrating Fault-Tolerant Feature into TOPAS Parallel Programming Environment for Distributed Systems," parelec, pp.157, International Conference on Parallel Computing in Electrical Engineering (PARELEC'02), 2002
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