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International Conference on Parallel Computing in Electrical Engineering (PARELEC'02)
Adding Advanced Synchronization to Processes in GRADE
Warsaw, Poland
September 22-September 25
ISBN: 0-7695-1730-7
ASCII Text
x 
 
J. Borkowski, D. Kopański, M. Tudruj, "Adding Advanced Synchronization to Processes in GRADE," Parallel Computing in Electrical Engineering, International Conference on, pp. 139, International Conference on Parallel Computing in Electrical Engineering (PARELEC'02), 2002.
 
 
BibTex
x
 
@article{ 10.1109/PCEE.2002.1115222,
author = {J. Borkowski and D. Kopański and M. Tudruj},
title = {Adding Advanced Synchronization to Processes in GRADE},
journal ={Parallel Computing in Electrical Engineering, International Conference on},
volume = {0},
year = {2002},
isbn = {0-7695-1730-7},
pages = {139},
doi = {http://doi.ieeecomputersociety.org/10.1109/PCEE.2002.1115222},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Parallel Computing in Electrical Engineering, International Conference on
TI - Adding Advanced Synchronization to Processes in GRADE
SN - 0-7695-1730-7
SP
EP
A1 - J. Borkowski,
A1 - D. Kopański,
A1 - M. Tudruj,
PY - 2002
KW - null
VL - 0
JA - Parallel Computing in Electrical Engineering, International Conference on
ER -
 
J. Borkowski, Polish-Japanese Institute of Information Technology
D. Kopański, Polish-Japanese Institute of Information Technology
M. Tudruj, Polish-Japanese Institute of Information Technology
New synchronization mechanism using asynchronous computation activation and cancellation based on state monitoring of a parallel application, are presented. A proposal is given how to integrate the mechanisms with the GRADE graphical parallel program design environment. Necessary enhancements to the GUI along with the semantics and possible applications are presented. Efficient implementation methods for the proposed syncronization are discussed.
Citation:
J. Borkowski, D. Kopański, M. Tudruj, "Adding Advanced Synchronization to Processes in GRADE," parelec, pp.139, International Conference on Parallel Computing in Electrical Engineering (PARELEC'02), 2002
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