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International Conference on Parallel Computing in Electrical Engineering (PARELEC'02)
Automatic Loop Parallelization: An Abstract Interpretation Approach
Warsaw, Poland
September 22-September 25
ISBN: 0-7695-1730-7
ASCII Text
x 
 
Laura Ricci, "Automatic Loop Parallelization: An Abstract Interpretation Approach," Parallel Computing in Electrical Engineering, International Conference on, pp. 112, International Conference on Parallel Computing in Electrical Engineering (PARELEC'02), 2002.
 
 
BibTex
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@article{ 10.1109/PCEE.2002.1115214,
author = {Laura Ricci},
title = {Automatic Loop Parallelization: An Abstract Interpretation Approach},
journal ={Parallel Computing in Electrical Engineering, International Conference on},
volume = {0},
year = {2002},
isbn = {0-7695-1730-7},
pages = {112},
doi = {http://doi.ieeecomputersociety.org/10.1109/PCEE.2002.1115214},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Parallel Computing in Electrical Engineering, International Conference on
TI - Automatic Loop Parallelization: An Abstract Interpretation Approach
SN - 0-7695-1730-7
SP
EP
A1 - Laura Ricci,
PY - 2002
KW - null
VL - 0
JA - Parallel Computing in Electrical Engineering, International Conference on
ER -
 
Laura Ricci, University of Pisa
This paper presents an abstract interpretation to support the automatic parallelization of iterative constructs. The analysis approximates the range of values of any array subscript by integrating an interval analysis with one returning a set of simple linear restraints among program variables. To reduce the complexity of the analysis, a general methodology has been adopted that defines two different abstract domains, i.e. the interval domain and the bisector domain. The domains are then combined through the reduced product operator. A static tool implementing the analysis has been automatically generated through PAG. The results of the analysis of some kernel loops of the Perfect Club Benchmark are shown.
Citation:
Laura Ricci, "Automatic Loop Parallelization: An Abstract Interpretation Approach," parelec, pp.112, International Conference on Parallel Computing in Electrical Engineering (PARELEC'02), 2002
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